Four GPU-months down to under a GPU-week. That’s the training-time collapse Sony just disclosed for PSSR 2.0, and it happened because the company’s engineers took capability away from the neural network rather than adding more. Sony principal software engineer Daniel Craig walked through the details at a SIGGRAPH 2026 talk this week, and the shift he described is the opposite of where I expected upscaling models to head next.

The original PSSR asked a single convolutional neural network to do almost everything: temporal accumulation, edge detection, and the HDR color blending that determines whether a final frame looks right. That last part became the network’s weak spot. Neural nets excel at pattern recognition but struggle with the precise numerical blending conventional GPU math handles well, and PSSR’s color-predicting design also ran into a vanishing gradient problem, where the model leaned too hard on short-term frame data and lost stability over time. Foliage and ray-traced global illumination, both low-frequency and slow-changing by nature, were where it showed up worst.

PSSR 2.0’s fix is to make the network do less, not more. Sony and AMD’s engineers switched from a color-predicting network to a kernel-predicting network, or KPN, which now has one job: figure out where the edges are and separate real detail from noise. The actual HDR blending and reconstruction moved back to ordinary GPU math, the stuff silicon has always been good at. I like this move on principle. It’s the same lesson chiplet design and CUDA-adjacent software stacks keep re-teaching the industry: that the fastest way to fix a system isn’t always to make the smart part smarter; sometimes it’s figuring out which parts don’t need to be smart at all.

The efficiency numbers back that up in a way that’s honestly a little startling. Most of the network’s processing now happens at 540p or lower, instead of burning capacity on high-resolution operations the way the original model did. The kernel itself changed shape too: PSSR 1 defined its 3×3 kernel at output resolution, which is why heavy upscaling ratios came out soft, since you’re only sampling from a handful of actual rendered pixels. PSSR 2.0 defines the kernel at input scale using elliptical filtering instead, sampling from more real data before it ever gets stretched. None of this is dramatic on its own. Stacked together, plus a rework of the quantization pipeline, it’s what took training from four GPU-months to under one GPU-week, which is the kind of iteration-speed unlock that changes how often a studio can afford to retrain the model against new content rather than shipping something close enough.

What the talk didn’t give us matters too. No frame-time numbers, no memory figures beyond “both improve,” and the test content was entirely first-party, so take the polish here with the obvious grain of salt about third-party ports running whatever half-implemented version ships in someone else’s engine. There’s also a rumor this quietly kills: multiple leakers had been talking up a transformer component in PSSR 2.0, and Craig’s talk says flatly there isn’t one. KPNs aren’t new as a concept. What’s notable is Sony applying one to this precisely, to a problem everyone else in the neural rendering space keeps trying to solve by throwing a bigger model at it instead.

That’s the part I find genuinely interesting to sit with, because it’s the opposite bet Nvidia just made. Nvidia’s neural texture compression leans further into asking Tensor Cores to do more work, not less, and it’s still fighting bandwidth and hardware-parity problems on anything that isn’t a current-generation RTX part. Sony’s PSSR team looked at a similar bottleneck and went the other direction: shrink the network’s job description until conventional math can cover the rest. I don’t think one approach is obviously right. I do think it’s a real philosophical fork in how the next few years of upscaling architecture get built, and I’m curious which side AMD’s own FSR roadmap lands on given it co-developed both halves of this PSSR revision.

This also lands in a hardware moment where PlayStation and its handheld-adjacent competitors are all fighting the same margin problem from different angles. Qualcomm’s Snapdragon X still has a software ceiling no amount of silicon fixes on its own, and Intel’s Arc G3 chips are trying to buy into the handheld gaming category from the hardware side the same way PSSR is trying to buy Sony headroom from the software side. Cheaper training, tighter kernels, less wasted neural capacity, all of it is really about squeezing more perceived performance out of silicon that isn’t getting meaningfully cheaper to manufacture. I’m not touching the PS6 handheld rumors; this keeps getting tied to online. That’s speculation stacked on speculation, and this post is about the architecture, not the roadmap gossip built on top of it.

Sources