China’s DRAM Insurgent

20,000 wafers a month in 2019. Roughly 240,000 a month by the end of 2025. That arc should worry Samsung, SK Hynix, and Micron, and it took a company that did not exist before 2016 to draw it.

ChangXin Memory Technologies (长鑫存储, CXMT) was incorporated in May 2016 in Hefei, capital of Anhui province, at almost the exact moment China’s semiconductor ambitions turned into funded policy. The founding lined up with the launch of the China Integrated Circuit Industry Investment Fund’s first phase, and the company has lived inside that political-financial ecosystem ever since. It started life as Innotron Memory, later Hefei Chang Xin, names less memorable than the plan behind them: build China’s first domestically viable DRAM supply chain from nothing.

The first few years were modest and looked it. By 2019 CXMT was pushing about 20,000 wafers a month on a 19nm process, turning out LPDDR4 and DDR4, commodity parts Samsung and SK Hynix had commoditized years before. That doubled to 40,000 a month by 2020. Then the curve bent. By the end of 2025 CXMT was producing roughly 720,000 wafers per quarter, about 240,000 a month, per figures Wikipedia cites from Reuters. SemiAnalysis projects 350,000 a month by the end of 2026; a Network World report puts it at 300,000 from an unnamed analyst. The gap between those numbers is probably a matter of ramp assumptions or measurement windows, and it barely matters, because both land in the same place. CXMT is closing on Micron’s estimated 385,000 wafers a month, a sentence nobody would have written five years ago.

The catalog now runs across DDR4, DDR5, LPDDR4X, LPDDR5, and LPDDR5X. DDR5 tops out at 8,000 MT/s across 16Gb and 24Gb densities. HBM is in active development, with HBM3E mass production targeted for 2027 and a dedicated back-end packaging plant planned for Shanghai by the end of 2026. Chairman and CEO Zhu Yiming has run the expansion, but the ownership tells the real story. There is no single controlling shareholder: Qinghui Jidian holds the largest slice at 21.67%, then ChangXin Integrated at 11.71%, China’s Big Fund II at 8.73%, Hefei Jixin at 8.37%, and Anhui Investment at 7.91%. That mix of state-adjacent funds and provincial government entities is textbook China strategic buildout, and it shields CXMT from the capital discipline any purely commercial shareholder base would enforce.

CXMT never tried to meet Samsung or SK Hynix at the frontier, which was the smart move. It found a gap the AI boom had pried open. The three incumbents were dragging their advanced capacity toward High Bandwidth Memory for AI accelerators, and that left commodity DDR4 undersupplied. CXMT went into DDR4 in earnest in 2023, priced hard, and swallowed the volume the majors had stopped caring about. The pressure got weird enough that DDR4 briefly cost more than DDR5, an inversion Jim Handy of Objective Analysis called a genuine surprise. Then CXMT trailed the majors into DDR5 as that transition matured.

Counterpoint Research had CXMT at about 4% of global DRAM revenue in Q2 2025. By Q1 2026 it had roughly doubled to 8%. The big three still hold north of 90% between them, but they are watching that lead erode at the edges. The financial swing underneath is louder. CXMT posted an operating loss of 2.8 billion yuan in Q1 2025, then flipped to an operating profit of 35.4 billion yuan (about $5 billion) on revenue of 50.8 billion yuan (about $7.5 billion) in Q1 2026. That is a 70% operating margin and year-on-year revenue growth of roughly 719%. The prospectus for its Shanghai IPO projects H1 2026 revenue of 110 to 120 billion yuan.

Those margins should make you suspicious, not impressed. DRAM is about the most cyclical business in semiconductors, and a 70% operating margin is what a shortage looks like, not what a cost structure looks like. The current profit rides entirely on an AI-infrastructure-driven crunch. DRAM cycles always turn, and when this one does, CXMT’s cost position is what will be exposed. The company runs without EUV lithography, which drags on both yield and how fast it can advance nodes. Multi-patterning on DUV tools can fake some of what EUV delivers, but at higher complexity and lower throughput. A long enough downturn could pry open the gap between the margins CXMT prints today and where its costs actually sit against rivals who have run EUV for years.

The export control regime keeps ASML’s EUV machines out of CXMT’s hands, and that lockout is the single most consequential constraint on the whole trajectory. EUV enables single-exposure patterning at sub-10nm features, which matters for leading-edge DRAM nodes and for HBM stack density. Deprived of it, CXMT leans on multi-patterning DUV: more mask steps, more process complexity, worse yields at the same node. Seoul National University professor Kim Hyung-jun pegs the resulting gap between CXMT and the Samsung/SK Hynix frontier at two to three years.

Whether capital can buy back what equipment access denies is the bet behind the IPO. The planned listing on the Shanghai Stock Exchange’s STAR Market, approved by the China Securities Regulatory Commission in June 2026 with a 12-month validity window, targets a raise of 29.5 billion yuan (about $5.12 billion) through 10.6 billion shares. If it lands, it is the largest Chinese IPO of 2026. The proceeds are carved up with telling precision: 7.5 billion yuan for memory wafer production-line technology upgrades, 13 billion for DRAM memory-technology upgrades, and 9 billion for forward-looking DRAM R&D. Almost none of it goes to raw floor space, which is CXMT admitting that its medium-term problem is process capability, not fab square footage.

HBM is where the roadmap gets genuinely hard. SemiAnalysis projects CXMT hitting 55,000 HBM wafers a month in 2027 and 100,000 a month by 2028. HBM3E is not just good DRAM dies. It needs precision through-silicon via (TSV) processing and thermal compression bonding for the stacks, skills that have little to do with planar DRAM manufacturing. The Shanghai packaging plant is meant to handle that back-end problem. What nobody can answer yet is whether CXMT can hit HBM3E yields that compete with SK Hynix, the current HBM supplier of record to NVIDIA, without EUV-enabled die shrinks under it.

If the SemiAnalysis capacity numbers hold, CXMT reaches 420,000 wafers a month in 2027 and 500,000 by 2028, a jump north of 42% over the 2026 baseline that would put it comfortably past Micron’s current output. Micron is not sitting still for it. On July 4, 2026 it broke ground on a new fab in Hiroshima, backed by about 1.5 trillion yen (around $945 million).

The moment that carried more weight than any wafer count came when CXMT dies showed up inside a Corsair product. A Corsair Vengeance DDR5 kit, part number CMK5X16G3E60C36A2-CN, rated 6,000 MT/s with CL36 timings and sold in China, was confirmed via CPU-Z to contain CXMT DRAM. Corsair has historically bought only from Micron, Samsung, and SK Hynix. This kit carries Intel XMP and AMD EXPO certification and meets CE and UKCA standards, meaning it cleared the validation those bodies demand. Nothing gray-market or white-label about it. A named Western consumer brand shipped a certified product built on Chinese DRAM.

The kit itself is nothing special; a 16GB DDR5 module at 6,000 MT/s is not leading edge. What matters is the qualification pipeline it implies. XMP and EXPO certification means Intel and AMD had to validate the memory controller interaction, which means they tested CXMT silicon and it cleared the bar. Reports also say Apple is evaluating CXMT as a supplier, with no agreement confirmed. Apple qualifying CXMT DRAM for iPhone or Mac would dwarf the Corsair story by orders of magnitude. Lenovo has surfaced in some reporting as a potential partner too, which fits the pattern of CXMT climbing the customer stack from anonymous Chinese OEMs toward names buyers recognize. As the world’s largest PC maker by shipment volume, Lenovo would hand CXMT both real volume and a credibility signal that carries into enterprise procurement.

None of this has been clean. CXMT has drawn serious allegations of acquiring technology by improper means. South Korean authorities arrested ten former Samsung Electronics employees on charges tied to alleged theft of DRAM process technology, with CXMT named as the destination. Two SK Hynix engineers were arrested separately over alleged IP leaks to CXMT and Huawei. The cases are not fully resolved, but they already color how Seoul and Washington read CXMT’s node progress, and the question underneath is blunt: is the rapid advancement organic R&D, or was it accelerated by process knowledge that was not CXMT’s to have?

US policy on the company reads like two departments talking past each other. The 2022 National Defense Authorization Act banned federal procurement of CXMT chips, and in June 2026 the Department of Defense added CXMT to its list of Chinese military-linked companies. Yet Network World reported that CXMT and YMTC were removed from the Pentagon’s restricted supplier list, which would crack open US commercial and government contract markets. A military-linked designation and a removal from a restricted list at the same time probably means two different lists under two different statutory authorities, or two moments in a policy process still in motion. For any US company weighing CXMT as a supply option, that distinction is everything, and public reporting has not nailed it down.

What is not ambiguous is the corner CXMT now occupies. It is too big and too capable to ignore, too politically tangled for easy Western procurement, and too important to Beijing to be allowed to fail. Big Fund II money, provincial government stakes, a $5 billion IPO, and a roadmap aimed squarely at HBM for AI infrastructure put it at the center of the fight over who owns the memory layer of the AI stack.

For a reference snapshot, here is where the players stand:

Metric	CXMT (2026)	Micron (2026 est.)	SK Hynix	Samsung
Wafer capacity (monthly)	300,000–350,000	~385,000	~450,000+	~600,000+
Global DRAM market share	~8% (Q1 2026)	~22–24%	~30–32%	~38–40%
DDR5 max speed	8,000 MT/s	8,800+ MT/s	9,600+ MT/s	9,600+ MT/s
HBM status	HBM3E dev; mass prod. 2027	HBM3E in production	HBM3E dominant supplier	HBM3 in production
EUV access	No	Yes	Yes	Yes
Technology gap vs. frontier	~2–3 years	Frontier	Frontier	Frontier

In under a decade, and without the most advanced lithography on the market, CXMT went from a marginal domestic supplier to a company bending commodity DRAM pricing, turning up in Western consumer products, and building toward HBM. The 2 to 3 year gap analysts cite is real but it is a moving target, because the incumbents keep advancing and the export controls exist precisely to widen it. The thing I actually doubt is the timing: whether CXMT’s capital flood and government backing can outrun the EUV ceiling before this DRAM cycle turns and the shortage funding all of it evaporates. Bet against that and you are betting against a company Beijing has decided cannot be allowed to lose.